AD5317ARU: +2.5 V至+5.5 V、400µA 阿里巴巴bdtic的博客BLOG

AD5317ARU:  +2.5 V至+5.5 V、400µA、四通道、轨到轨输出10位DAC

The //AD5327 are quad 8-, 10-, and 12-bit buffered voltage-output DACs, in a 16-lead TSSOP package, which operate from a single 2.5 V to 5.5 V supply consuming 400 µA at 3 V. Their on-chip output amplifiers allow the outputs to swing rail-to-rail with a slew rate of 0.7 V/µs. The AD5307/ AD5317/AD5327 utilize a versatile 3-wire serial interface that operates at clock rates up to 30 MHz and is compatible with standard SPI, QSPI, MICROWIRE, and DSP interface standards.

AD5307/AD5317/AD5327分别是四通道8/10/12位、缓冲电压输出DAC,提供16引脚TSSOP封装,采用2.5 V至5.5 V单电源供电,3 V时功耗为400 µA。这些器件内置片内输出放大器,能够提供轨到轨输出摆幅,压摆率为0.7V/µs。AD5307/AD5317/AD5327采用多功能三线式串行接口,能够以{zg}30 MHz的时钟速率工作,并与标准SPI、QSPI、MICROWIRE、DSP接口标准兼容。

产品聚焦
  • Available in a 16-lead TSSOP package
  • Low power, single supply operation from 2.5 V to 5.5 V supply
  • Consumes 1.2 mW at 3 V and 2.5 mW at 5 V
  • Rail-to-Rail output with a slew rate of 0.7 V/µs
  • 3-wire serial interface with clock rates up to 30 MHz
  • Pin- and Software-Compatible with the AD5317 (10-Bit) and the AD5327 (12-Bit)
  • 提供16引脚TSSOP封装
  • 低功耗,采用2.5 V至5.5 V单电源供电
  • 3 V时功耗为1.2 mW,5 V时功耗为2.5 mW
  • 轨到轨输出,压摆率为0.7 V/µs
  • 三线式串行接口,时钟速率{zg}达30 MHz
  • 与AD5307(8位)和AD5327(12位)引脚兼容、软件兼容
AD5317ARU 特点
  • Four 8-Bit DACS in 16-Lead TSSOP
  • Low Power: 500 µA @ 5 V, 400 µA @ 3 V
  • Power-Down to 300 nA @ 5 V, 90 nA @ 3 V
  • Guaranteed Monotonic by Design
  • Power-On-Reset to Zero Volts
  • Double-Buffered Input Logic
  • Output Range: O-VREF O-2VREF
  • Low Power, SPI™, QSPI™, MICROWIRE™ and DSP-Compatible 3-Wire Serial Interface
  • Simultaneous Update of DAC Outputs via LDAC pin (active low)
  • Asynchronous Clear Facility via CLR pin (active low)
  • SDO Daisy-Chaining Option
  • Buffered/Unbuffered Reference Input Options for each DAC pair
  • 4个10位DAC,采用16引脚TSSOP封装
  • 低功耗:500 µA (5 V),400 µA (3 V)
  • 省电模式:300 nA (5 V),90 nA (3 V)
  • 通过设计保证单调性
  • 上电复位至0 V
  • 双缓冲输入逻辑
  • 输出范围:0 V至VREF 或0 V至2VREF
  • 低功耗,SPI™、QSPI™、MICROWIRE™、DSP兼容三线式串行接口
  • 通过LDAC引脚(低电平有效)同时更新DAC输出
  • 通过CLR引脚(低电平有效)提供异步清零设置
  • SDO菊花链选项
  • 每对DAC均可选择缓冲/无缓冲基准电压输入
AD5317ARU 功能框图

AD5317 芯片订购指南

AD5317ARU 应用技术支持与电子电路设计开发资源下载
  1. . PDF(PDF 文件格式完整版)
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