The spectrally efficient modulation formats are very
sensitive to the Intermodulation Distortion (IMD) that mainly results from nonlinearities intrinsic of the PA. Hence,significant back-off (BO) levels of operation are required to achieve linearity, thus penalizing power efficiency in the PA.
The wider bandwidths, often scalable, and the adaptive modulation process imposed in modern communications standards increased PAPR (peak to average power ratio) figures so then aggravating the linearity vs. efficiency problem.
A recognized solution to avoid the power inefficient operation without enlarging the spectral regrowth is the use of PA linearizers, being Digital Predistortion (DPD) of the most important linearization techniques due to the current availability of faster Digital Signal Processing (DSP) hardware.
Due to aspects such as aging, heating or load impedance
variations, the PA is a long-term time-variant nonlinear system,
Therefore, the PA behavior needs to be periodically monitored
in order to eventually adapt the Digital Predistorter (DPD) to
counteract possible changes in its behavior or in its mode of
operation.
Therefore, the PA behavior needs to be periodically
monitored in order to eventually adapt the Digital Predistorter
(DPD) to counteract possible changes in its behavior or in its
mode of operation. Unlike in [1], there is no need to stop the
transmission and switch into a training mode, because the DPD
adaptation can be enabled/disabled by the user in a hot manner.
It is thus possible to simultaneously transmit and adapt the
DPD thanks to the real-time parallel processing performed by
the Field Programmable Gate Array (FPGA) device. This
architecture improves the DPD configuration in [2], where the
predistortion function was already implemented in a FPGA
device by means of a set of Basic Predistortion Cells (BPCs),but the update of the contents of these BPCs (complex gains
stored in look-up tables) was performed in a host PC.
Following the same principles explained in [3], the adaptation
of the DPD is carried out using the Least Mean Square (LMS)
algorithm to update all single complex gains that fill a BPC.
This paper is an extended version of a work presented in the
Topical Symposium on Power Amplifiers for Wireless
Communications (San Diego, 2009).